Abstract
This workshop aims to discuss novel ideas and methodologies of FPGA technologies for adaptive computing. As High-Performance Computing (HPC) and Artificial Intelligence (AI) technologies become more and more important, the needs for highly efficient computing systems and architectures have also been increasing. FPGA technologies are one of the promising schemes for highly efficient adaptive computing systems, where a specific computation is done by hardware accelerators, with a much shorter time and much smaller energy consumption.
Topics of interest
Topics of interests of this special session include, but are not limited to:
- FPGA acceleration for HPC applications, such as machine learning, data engineering, scientific computation, etc.
- Innovative FPGA technologies
- Interconnection network and network-on-chip for adaptive computing
- Optimized soft processors and processing elements on FPGA
- Rapid-prototyping for FPGA-based computing engines
- Asynchronous computing circuits on FPGA
- Tools for synthesizing custom computing circuits for FPGA
- Educational systems for experiencing FPGA acceleration
Submission Information
Potential authors of this workshop should prepare the extended abstract of their paper, whose length is two (2) or three (3) pages. Each submitted extended abstract will be reviewed by at least three reviewers and will be evaluated based on usefulness, originality, relevance to the workshop's theme, and technical quality.
An extended abstract should be formatted in the same format as ICS 2024. See the submission guidelines of the ICS main conferencefor details (including the LaTeX template). However, submissions will be reviewed by the FTAC program committee through a single-blind process. This means that authors do not have to omit author names, affiliations, etc.
If authors get their extended abstract accepted, they have to submit the camera-ready version of their paper that is no longer than eight (8) pages. Also, at least one of the authors has to register for the conference, and an author has to present their paper at the workshop.
To encourage discussions on innovative ideas and methodologies of early stages, the proceedings of this workshop will only provided to the workshop attendees and will NOT published.
This workshop uses EasyChair to manage the submitted papers. To submit your extended abstract, please register the necessary information and upload your PDF at the submission page.
Important Dates
- Extended abstract submission: 23:59 JST (14:59 UTC), April 7, 2024 (extended)
- Author notification:
April 19, 2024April 23, 2024 - Camera-ready submission: May 17, 2024
- Date of workshop: June 4, 2024
Committee
Organizing Committee
- General Chair: FUJIEDA, Naoki (Aichi Institute of Technology)
- Program Chair: SATO, Shimpei (Shinshu University)
Program Committee (Tentative)
- Program Chair: SATO, Shimpei (Shinshu University)
- KOBAYASHI, Ryohei (University of Tsukuba)
- KISE, Kenji (Tokyo Institute of Technology)
- MIYAJIMA, Takaaki (Meiji University)
- MIYOSHI, Takefumi (WasaLabo, LLC.)
- Nesrine Berjab (Tokyo Institute of Technology)
- OHKAWA, Takeshi (Kumamoto University)
- SAITO, Hiroshi (University of Aizu)
- TANAKA, Kiyofumi (JAIST)
- Thiem Van Chu (Tokyo Institute of Technology)
- WADA, Yasutaka (Meisei University)